Aaron E. Baranoff
6 Santa Nella, Rancho Santa Margarita, California 92688
Cell: 949-795-7309 Email: firstname.lastname@example.org
I have over 30 years of experience leading and growing in the software and firmware industry specializing in communications, embedded systems, firmware, drivers, real-time, DSP and other applications software research and development, additionally I have ASIC and FPGA development experience. I have spent most of the time working right at the interface between software and hardware and helping to improve the products I have been involved with by improving both software and hardware and leveraging each of their strengths. I am an embedded software engineer as well as being very at prolific ASIC and FPGA verification, co-simulation, design and debug. I am very good at leveraging all of my experience from across my skills to succeed in whatever project is put in front of me which includes 20 years as a technical lead or manager.
Rutgers University, BA: August, 1988 Major: Computer Science (Science-Math Specialty)
University of California, Irvine: December, 2002: Certificate of Specialized Studies in Advanced Digital Systems Engineering
Oregon Graduate Institute School of Science & Engineering, Windows Driver Model for Windows 2000/XP: July 2002
Georgia Tech, DSP for Practicing Engineers: November 2001
2013 to Present
Chief Software Architect, Vubiq Networks, Inc. – Irvine, California, I lead and manage all software, FPGA, test engineering as well as most customer support. More recently adding managing the hardware team as well. While still being the lead software developer on the V10g product while managing sustaining activity for existing product. 10 gigabit 60GHz point to point link or 2.5 Gigabit with carrier grade switching. I report directly to CEO and CTO. With the team I built at a fraction of the size of all of our competitors and with a fraction of their budget we developed the V10g.
Senior Principal Software Engineer, VubIQ, Inc. – Irvine, California, I am the lead firmware architect. I am architecting and leading all things software for the HaulPass product line. I am involved with all aspects of the software development from picking the OSes to managing the data flow and even building the software team. I put in place the version control system and designed, and implemented the first device drivers, did the initial porting, and created all the software infrastructure from the ground up. As the software lead whatever I did not implement directly I lead. I been actively involved with all parts of the implementation HaulPass from designing its auto aligning capability and maintaining it 60 GHz full duplex Gig-E link on a swaying light post (LoS) links, as well as 5 GHz (802.11n) capability for automatic failover to non-line of sight (NLoS) connectivity.
2003 to Present
Part-time Instructor, University of California Irvine – Irvine, California (in parallel with other employment on evenings and weekends), I developed and am teaching five courses for UCI extension’s Embedded System Technologies Certificate that I lead and developed, “C for Embedded Systems”, “Writing Portable Device Drivers”, “Getting Systems and Hardware Working: Co-Development and Co-Debug”, “Embedded Linux Device Driver Primer” and “FPGA Design with Hardware Descriptive Languages”.. The “C for Embedded Systems” jump starts students who’s ‘C’ experience may not be strong enough to get them going in the Embedded Systems program at UCI. The “Writing Portable Device Drivers” takes students past just making a single point solution to writing device drivers in a way where most of the code can be reused across multiple platforms. This course also goes into reading datasheets and what portability means in a device driver. The “Writing Portable Device Drivers” course goes from datasheet to code. The material for these courses has been developed from my many years of experience in helping to develop and lead engineers. In addition to teaching these courses on campus at in Irvine I have taught them for UCI at other locations and created and taught a combined version of “C for Embedded Systems” and “Writing Portable Device Drivers” for UCI for their on and off campus special training programs as well as modified the “C for Embedded Systems” course and created an online versions of all of my regular courses. In addition I have helped by teaching other courses when other instructors were not available and helped develop other instructors. I have also promoted the program and pushed to make it more accessible on mobile devices.
I have had recommendations too many to count but here are some…
● “Aaron is a great instructor. I just wrapped up my first UCI extension course for embedded systems development. The course itself has tremendous value but at the core of that value is Aaron Baranoff he provides an insight that mixes the academic lessons with real life examples. The result is a more complete picture and a better understanding of the concepts. Aaron's attention to detail and his thorough explanations of the concepts are invaluable. Next to that his commitment to his students and the help he provides is a credit to his professionalism as an instructor.”
● “Aaron has come on-site at our company to teach several Embedded Systems Programming classes. I have been a student in most of them. Aaron has a very practical get the job done approach. It's obvious that he not only teaches the material but he uses it in his every day work life. His advice and methods are easily applied immediately in my own work environment. If you want hands on advice and training that works then I would recommend that you choose Aaron.”
2003 to Present
Advisory Committee Member, University of California Irvine – Irvine, California (in parallel with other employment on evenings and weekends), I advise UCI extension, helping to guide their Embedded Systems Engineering certification program. I help in defining and expanding the program while making sure the program meets the needs of the business and community and helped promote it.
From my managers at UCI…
● “Aaron is one of our most prolific and highly rated instructors. He does an amazing job developing and delivering high-quality courses while meeting the demands of his full time job. Aaron's students often take all the classes he offers and he constantly has some of the highest enrollments in this program area. Aaron is truly an expert in all things embedded systems. Aaron devotes the highest quality, commitment and energy to all that he does. He would be a tremendous asset to any organization lucky enough to include him as an employee.”
● “Aaron has served on the UC Irvine Embedded Systems Engineering advisory committee and as an engineering instructor. Aaron has contributed his industry engineering design knowledge to the development of UC Irvine’s Embedded Systems Engineering certificate program. Practicing professionals participating in the program have benefited from his expert knowledge. Participants have been very satisfied with his teaching.”
2007 to 2013
Principal Engineer, L3 Communications, Interstate Electronics Division– Anaheim, California, I had a lead role in validated and verifying the company’s ASICs as well developing key embedded software for the project and contributing to systems design. In addition to my regular responsibilities I maintained the co-simulation environment in one of our labs and have been a primary lead in critical system features and throughout and am a primary player in the project integration. Normal debug and test flow includes using NCSim, the Palladium, C/C++ compiler as well as assembly language. I am a key player in cross function system development (hardware, software and systems) with my experience in ASIC design and verification as well as embedded software and co-simulation. In addition to my regular responsibilities I automated the build process including a system of automatic email notification of issues. From customers to my managers alike I am sought out for my technical skills and willingness to go above and beyond to help them and others. I have even applied my teaching skills to better support customers and co-workers alike.
I personally oversaw deploying the first major software tools upgrade in years which gave a major improvement in terms of engineering productivity and software performance. Then, I was asked to take on the role as a lead software architect and deployed many improvements to the software tool flow while still being involved with all my original day to day activities. In my new role as a lead software architect I took on additional responsibilities and I help oversee a cross project use of a common software architecture and baseline.
In my all of my reviews comments like this are normal my manager wrote the following about me…
● “I worked closely with Aaron during much of the last year. I can confidently state that he is the most effective software engineer I have seen in the lab in my career. He zeroes in on the problem very quickly. He finds or knows alternative methods to get the information he needs to solve the problem. Back when we added 20 contractors on to the software team, everyone that worked with Aaron came to my office to say how impressed they were with his skills and knowledge.”
● “He is not only productive for himself, his guidance to his peers, his scripts, etc., help them to also be more productive.”
● “He has exceeded expectations in all the right areas. He just continues to impress me. Aaron is clearly positioned in a great match for his skills. He has helped the entire team to solve complex issues. Most of the last twelve months he was being pulled in multiple directions at the same time. He calmly, efficiently and effectively multiplexes across all the demands.”
● “I have received laudatory comments and correspondence too numerous to mention. All of them were about the MUE development area in which Aaron is lead engineer. Most of these comments call out Aaron by name.”
● “Numerous alternative solutions was more like a daily job description for Aaron during the system test period.”
● “He started working with an ASIC engineer who had been working on one aspect for about 8 months. Within a day of seeing that design for the very first time, Aaron was finding problems and offering solutions to the problems. It was very impressive.”
● “He calmly, efficiently and effectively multiplexes across all the demands.”
● My reviews have included comments on the $200,000 I saved the last ASIC development as well as process improvements that cut costs and will improve engineering productivity and along with additional suggestions that I have made to saving the company money and reducing risk.
● “Aaron is a positive example for the team. He never gets flustered by even the toughest of problems or the most stressful periods. His calm demeanor translates into the team working more effectively.”
2004 to 2007
Co-Founder, MataiTech LLC – Rancho Santa Margarita, California, I contracted in support of MataiTech and work directly on its internal products as well as manage day to day engineering activities. MataiTech does custom firmware, ASIC/FPGA design and verification as well as our own software product NAUET. NAUET is targeted to the embedded market place and the ASIC and FPGA industry using SPIRIT IP-XACT. I did the initial work on our first software product called NAUET and manage its development. I personally designed the import engine importing from Verilog and VHDL to IP-XACT and did the initial coding for the code generation portions of the software including, Verilog, VHDL, SystemC and C/C++ and continue to add more features to the product. I personally put in place most of the engineering infrastructure and developed and signed our first clients and setup our first technology licenses. I am actively involved with all aspects of business development, coding C/C++ and Verilog and team development as well as ongoing business activities. I also developed the initial engineering infrastructure as well as establish the company and the website, email and version control all within a few weeks of starting the company. I created the initial architect of several designs M1000 and M2000 and setup the development environment and did all the initial Verilog coding as well as 3rd party IP integration. I also have done RTOS porting and development and started work on many of our contracts. I actively contribute to software code as well as FPGA and ASIC design. I licensed C/Verilog co-simulation technology which I personally wrote. The co-simulation environment I created used the existing Modelsim environment and allowed C code drivers to be tested against the simulation of the chip prior to tape-out. Now the co-simulation environment works with ModelSim, VCS and Veritak and can work under Windows or Linux. Contracts I have personally done the primary engineering on included software for an ultra lower power RF communication system, XSCALE boot code, IR drivers and a SCSI target driver for a scanner device as wells as various board bring ups and hardware verification and debug. Additionally, for a client I developed a FPGA which includes FEC (Forward Error Correction) 100/10 Ethernet FPGA with I2C slave, line quality monitoring. I also designed IP for encryption (AES128) and customized it for several customers. Other contracts included developing tests for an implantable medical device, ASIC and FPGA verification, validation and debug. In addition, I developed business partnerships with many local, national and international companies and have patents pending on several key technologies for MataiTech. I filed the provisional patents and helped others do the same for the company.
2003 to 2004
Principal Engineer, Xiran Division of SimpleTech (Division Shutdown) – Irvine, California , I was a lead for initial device bring up and initial diagnostics from the ASIC group and was responsible for making the transition from the ASIC group to software group go smoothly. Helped in developing the group and contributed to improving the Direct Path product line. I cut simulation time in nearly in half within two weeks of starting at the company. I developed and implemented the co-simulation environment for the benefit of the ASIC development group and the software group while allowing for improved test coverage with shorter test development times. I actively contributed code for the on chip firmware, diagnostics and Verilog code to the projects of was involved with. I also was actively involved with code quality improvement with both the hardware and software groups and trying to identify performance bottle necks as well as architected and implemented hardware and software solutions to these bottlenecks. I was heavily involved with test automation development and making sure those tests rolled from simulation into the lab on the prototype FPGA and then ASIC. With this system most of the tests rolled right into the lab without a hitch and many problems were caught prior to tapeout.
2002 to 2003
Senior Staff Systems Engineer (Software Lead), TDK Semiconductors (division sold to Golden Gate Capital in 2005) – Irvine, California, I was technical lead for software and systems development of all networking products. Primary responsibilities include software development for the Ethernet MAC/PHY products. I developed and lead the development of Windows and Linux drivers as well as embedded drivers for VxWorks, OS20 and other real time operating systems. In addition to software development work, I developed Verilog test benches for the several products and contributed to the chip design for several products and their test boards. Verilog developments included a generic register and memory test bench that shared a common control file with a C version of the register and memory test so the chip under test could be verified both before and after production. Responsibilities included building up the systems group for the network products and building a software infrastructure including tools and equipment. I have also been training the whole software department on writing portable device drivers as well as on VxWorks and version control. I have personally written VxWorks, OS20, and Linux drivers for TDK’s products as well as support the non-networking product development as needed. I have also done some maintenance work on Windows 2000/XP drivers. In addition writing code and managing software developments I have helped to locate several hardware issues and saved the company hundreds of thousands of dollars in tape-out costs I actively contribute to the hardware (ASIC) development by via direct contributions to the designs as well helping on architectural issues in balancing software versus hardware needs. Additionally I developed two test FPGAs used to debug and test ASICs.
2000 to 2002
Core Systems Software Manager, Accelerated Networks (merged with Occam Networks) - Moorpark, California. Managing the firmware, boot ROMs, manufacturing diagnostics and DSP software development. I was responsible for all cross platform hardware interfaces and managed all the personnel to make that happen. I had as many as nine direct reports. I had both responsibilities for day-to-day management as well as technical management. Under my management we had improved software quality and performance on both our IAD and MSAP product lines. Despite some poor stock market performance and employee turnover and layoffs, my group had no turnovers and continued to be productive. Responsibilities had also included management of several board developments (including the MSAP’s Channelized DS3 card), which included both new hardware and the associated software. Highlights included improving our IAD Ethernet traffic performance by nine fold while halving the CPU utilization (I was personally involved with the driver redesign and reorganizing the hardware software balance as well as managing the others involved) and major voice quality improvements across all of our products (I was personally involved with many of the code changes as well as managing the others involved). In improving the voice quality I personally worked on reduced the DSP CPU utilization by about 20% while mentoring a junior engineer and teaching him about code optimization. This optimization allowed us more to add features to the DSP while improving the compressed voice quality. On the channelized DS3 card I was responsible for initial board bring up. I ported the several of the drivers including the IMA drivers, the various framers, wrote some of the board support package. And I also managed the rest of the diagnostic ROM development and boot ROM development. At the same time I actively worked with one of my engineers at doing an RTOS update on the IAD product line. I managed the tool roll out and the transition to the updated code base.
Group Lead of MSAP Software, Accelerated Networks - Moorpark, California. I was directly responsible for stabilizing the low level code on the MSAP product line. Under my leadership we fixed many long-standing software issues with our MSAP product lines. These items included continuing the work I started on improving the AAL5 performance. My personal highlights including improving our products ATM shaping and policing characteristics. Specifically making the SAR more stringently comply with traffic profile requests.
Principal Member of the Technical Staff, Accelerated Networks - Moorpark, California. I performed as a technical lead for both a software and firmware group. Actively involve with both maintenance and new development. I was responsible for overhauling many of Accelerated Networks drivers. In addition to my other responsibilities I volunteered to take a lead role on improving the software quality from the ground up. Reviewed each low-level driver and personally fixed or planned the repair of each driver. This is in addition to development of new drivers as well as ongoing product maintenance. These drivers included SARs and Ethernet on both the MSAP and IAD product lines.
1995 to 2000
Senior Software Development Engineer, PMC-Sierra (Maryland) (formally IgT – division shutdown in 2003) - Gaithersburg, Maryland. I was technical lead on developing PMC-Sierra's long-term business plan for software. I also continued develop software for the AAL1 SAR (Aal1gator). I developed the packet drivers for PMC’s frame relay chips (FREEDM-NG). On the FREEDM-NG chip I developed one driver that supported all four variants of the chip. I then supported the driver through its early chip respins. Additional responsibilities have included pre and post sales support. I worked with customers to make the transition from IgT to PMC as painless as possible. Other involvements have included expanding the use of automated testing of both hardware and software. In addition I managed contractors for the development of other drivers such as PMCs next generation policing and shaping chips.
Senior Software Engineer, Integrated Telecom Technologies (IgT) - Gaithersburg, Maryland. I performed as technical systems and software lead on the development of much of IgT's software. This software includes the management of the ATM switch fabric and the routing within it. Other developments have included being the primary developer and technical lead for many of IgT's other drivers including IgT's highly successful AAL1 SARs, many UNI chips, UPC chips and others. I am quite familiar with ATM networking and its complexities such a traffic management, this while staying close to the hardware. I was also the primary point of contact for IgT’s technical support and sales for the ATM software product line. I help to answer their questions as well as those of the customers. I developed a simple connection administration and control (CAC) system to act as both a demo and example to our customers thereby reducing the number of support calls. My responsibilities included project and product planning, management of technical projects. In addition I have been out to customers to market, do technical support and field engineering for IgT’s software and hardware. Software developments also included power on self-test. My highlights have included playing a large part in taking IgT from having no software to making software a critical part of its business plans as well as developing a good interface and between the software development and the ASIC development teams. I was also actively involved with mentoring less experienced engineers.
1990 to 1995
Software Engineer, Telecommunications Techniques Corporation (TTC) (now part of JDSU) - Cept Telecom Division, Germantown, Maryland. I performed as Engineering Product Manager for two telecommunications testing products. I acted as principal software engineer and/or Engineering Project Manager on many new product developments and enhancements. These developments have me working closely with electrical and test engineering as well as manufacturing and marketing. Also I have acted as lead in automating TTC's software testing. I have written an application note and taught several product courses. I was also the expert in the use of PCs for development of products and I was the software expert on Xilinx, CCITT performance analysis standards, and data compression. My engineering highlights have included such things as designing, implementing, testing, and performing on site demos to customers of a 1 µS round trip delay measurement system in the Interceptor product line software without adding any additional hardware costs. Other highlights also included developing the CCITT M.2100 (M.550) and G.821 performance analysis software. This implementation offers simultaneous performance analysis at all valid rates and was designed to be portable to all Interceptor products as well as any other products with similar features within TTC. This was all while gaining International and US telecommunications expertise.
1983 to 1990
Programmer - E-Systems, Melpar Division (now Raytheon), Falls Church, Virginia. Perform software research and development, specializing in real-time device drivers and systems, including network and communications software. Perform as co-system administrator for UNIX and XENIX systems. I acted both as a lead programmer and co-programmer on several DOD projects.
Independent Programmer / Consultant – miscellaneous small companies (including Strobic Air), specializing in working with small to mid-size companies helping to setup systems and write software. Specialize in software for scientific, engineering and real-time applications. Consulting and purchasing agent for hard to find computer equipment or supplies. I developed systems and software ranging from banking and financial support software to engineering analysis of ventilation equipment systems.
Computer Language Experience
C, some C++, several Assembly languages (I960, x86, 68xxx, PPC, TMS320C5XXX and more), Verilog, Verilog PLI, VHDL, System C and others.
PCs , many in-circuit and JTAG emulators, many logic analyzers, Xilinx (XST) and Altera (Quartus), Cadence Palladium.
Operating System Experience
MS-Windows (all flavors), Linux, VRTX, VxWorks, OS20, Tornado, pSOS, TI BIOS and others.
IEEE Computer Society Member, ACM Member, Secret Clearance